`timescale 1ns / 1ps

module display_driver(
	input clk_i,  // 1kHz
	input [7:0] display_en_i,
	input [23:0] display_num_i,
	input [7:0] display_extra_i,
	input [2:0] display_blink_i,

    output [7:0] high_bus_o,
    output [7:0] low_bus_o,
    output [7:0] display_en_o
	);
	
	wire blink_pulse, bp;
	wire [7:0] display_en_mid;
	wire clk_1khz;

	assign clk_1khz = clk_i;
	assign bp = blink_pulse;
	assign display_en_o = display_en_mid & {bp, bp, bp, bp, bp, bp, bp, bp};

	// Generates the blink pulse
	blinker BLINKER(
		clk_1khz,
		display_blink_i,

		blink_pulse
	);
	
	// Each drives 4 digits
	display_half_driver HIGHDIGITS(
        clk_1khz,
    	display_en_i[7:4],
	    display_num_i[23:12],
    	display_extra_i[7:4],

	    high_bus_o,
    	display_en_mid[7:4]
    );
	display_half_driver LOWDIGITS(
        clk_1khz,
    	display_en_i[3:0],
	    display_num_i[11:0],
    	display_extra_i[3:0],

	    low_bus_o,
    	display_en_mid[3:0]
    );
endmodule
